Through new research published in Nature, Qing Cao and colleagues at the University of Illinois Urbana-Champaign have developed a new approach that sidesteps these problems, bringing high-performance 3D chips a step closer to reality.

Overheated stacks of transistors

Modern computer chips are built on thin wafers of silicon, with transistors (the tiny switches that process information) arranged in a single flat layer. If multiple layers of transistors could instead be stacked on top of each other on the same chip, it would dramatically increase their density without enlarging the chip’s footprint. However, this 3D design would cause the chip to overheat, which could destroy the circuitry already laid down beneath it.