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Boise, Idaho-based memory manufacturer Micron Technology says it has reached volume production of a 232-layer NAND flash-memory chip. It’s the first such chip to pass the 200-layer mark, and it’s been a tight race. Competitors are currently providing 176-layer technology, and some already have working chips with 200+ layers in hand.

The new Micron tech as much as doubles the density of bits stored per unit area versus competing chips, packing in 14.6 gigabits per square millimeter. Its 1-terabit chips are bundled into 2-terabyte packages, each of which is barely more than a centimeter on a side and can store about two weeks worth of 4K video.

With 81 trillion gigabytes (81 zettabytes) of data generated in 2021 and International Data Corp. (IDC) predicting 221 ZB in 2026, “storage has to innovate to keep up,” says Alvaro Toledo, Micron’s vice president of data-center storage.

Memory and storage chip maker Micron Technology says it is shipping samples of the most bit-dense DRAM memory chips yet. Compared with its own previous generation, the 16-gigabit DRAM chip is 15 percent more power efficient and 35 percent more dense. Notably, Micron achieved the improvement without resorting to the most advanced chip-making technology, extreme ultraviolet lithography. The features that make up DRAM cells are not nearly as tiny as those on logic chips, but this advance shows that DRAM density could still shrink further in the future.

Micron says it is shipping samples of LPDDR5X chips, memory made for power-constrained systems such as smartphones. (LPDDR5X, unpacked: a revved-up twist on the low-power version of the fifth generation of the double-data-rate memory communications standard, capable of transferring 8.5 gigabits per second.) It’s the first chip made using Micron’s new manufacturing process, called 1-beta, which the company says maintains the lead it took a year ago over rivals, including Samsung and SK Hynix.

Manufacturing processes for DRAM and logic chips diverged decades ago, with logic chips shrinking transistors much more aggressively as the years went by, explains Jim Handy, a memory and storage analyst at Objective Analysis, in Los Gatos, Calif. The reason for the difference has to do with DRAM’s structure. DRAM stores a bit as charge in a capacitor. Access to each capacitor is gated by a transistor. But the transistor is an imperfect barrier, and the charge will eventually leak away. So DRAM must be periodically refreshed, restoring its bits before they drain away. In order to keep that refresh period reasonable while still increasing the density of memory, DRAM makers had to make some pretty radical changes to the makeup of the capacitor. For Micron and other major manufacturers, it now resembles a tall pillar and is made using materials not found in logic chips.

What are you working on next?

Rosendo: Our next steps…will be on the development of the manipulability of this robot. More specifically, we have been asking ourselves the question: “Now that we can stand up, what can we do that other robots cannot?”, and we already have some preliminary results on climbing to places that are higher than the center of gravity of the robot itself. After mechanical changes on the forelimbs, we will better evaluate complex handling that might require both hands at the same time, which is rare in current mobile robots.

Multi-Modal Legged Locomotion Framework with Automated Residual Reinforcement Learning, by Chen Yu and Andre Rosendo from ShanghaiTech University, was presented this week at IROS 2022 in Kyoto, Japan. More details are available on Github.

Virgin Galactic, while fighting delays in returning tourists to space, is building for the future.

The new class of space tourist ship for Virgin Galactic, called Delta, is coming together with a new deal to fly Axiom Space astronauts along with contracts to secure key suppliers, the company said in press releases this week. Delta may fly as frequently as once a week and is slated to enter service in 2026.