A research team led by Professor Jae Eun Jang and Dr. Goeun Pyo from the Department of Electrical Engineering and Computer Science at DGIST has developed “dual-modulated vertically stacked transistors” that operate stably without current leakage even in two-dimensional nanoscale channel structures. A study on this work is published in the journal Advanced Science.

In recent years, the semiconductor industry has faced physical limitations as the demand to integrate more devices within limited space continues to grow. To overcome these constraints, “vertically stacked transistors,” in which current-carrying channels are vertically layered, have emerged as a promising alternative for next-generation 3D semiconductors. However, conventional vertically stacked transistors suffer from a critical drawback in which gate electric signals are not delivered uniformly into the channel interior due to their electrode structure, consequently leading to current leakage or unstable device operation as the channel length becomes shorter.

To address this issue, the research team proposed a “dual-modulation structure” in which two gates—positioned above and below—control the channel through different mechanisms. This represents an innovative approach in which current flows in a sandwich-like configuration, with the upper and lower electrodes facing each other across the channel.