3D integrated circuits promise smaller, faster devices with lower power consumption. Vertically stacked 3D integrated circuits also enable novel in-memory and in-sensor computing paradigms and incorporate functionally diverse materials, which can benefit many edge applications. There are several complementary approaches to 3D integration. For example, 3D heterogeneous integration involves stacking and interconnecting multiple chips, each potentially made from different materials or optimized for different functions, within a single package. On the other hand, 3D monolithic integration refers to fabricating layers of transistors sequentially on a single wafer, creating a more seamless and compact structure. This approach offers even greater density and performance benefits by reducing interlayer distances and improving signal integrity. Both techniques are crucial for advancing the next generation of high-performance, energy-efficient electronic devices and require interdisciplinary collaborations across materials science, electrical engineering, and semiconductor manufacturing.

In this Communications Engineering collection, we aim to drive research in the engineering side of 3D integration by bringing together the following topics of interest: