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Dec 12, 2021

Samsung and IBM Could Break the Nanosheet Threshold in Chips With ‘Vertically Stacked Transistors’

Posted by in categories: computing, materials

This design can either double the performance of chips or reduce power use by 85%.

In May of 2021, we brought you a breakthrough in semiconductor materials that saw the creation of a chip that could push back the “end” of Moore’s Law and further widen the capability gap between China and U.S.-adjacent efforts in the field of 1-nanometer chips.

The breakthrough was accomplished in a joint effort, involving the Massachusetts Institute of Technology (MIT), National Taiwan University (NTU), and the Taiwan Semiconductor Manufacturing Co (TSMC), which is the world’s largest contract manufacturer of advanced chips. At the core of the breakthrough was a process that employs semi-metal bismuth to allow for the manufacture of semiconductors below the 1-nanometer (nm) level.

Now, IBM and Samsung claim they have also made a breakthrough in semiconductor design, revealing a new concept for stacking transistors vertically on a chip, according to a press release acquired by IE. It’s called Vertical Transport Field Effect Transistors (VTFET) and it sees transistors lie perpendicular to one another while current flows vertically.

This is a drastic change from today’s models where transistors lie flat on the surface of the silicon, and then electric current flows from side to side. By doing this, IBM and Samsung hope to extend Moore’s Law beyond the nanosheet threshold and waste less energy.

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