May 8, 2021
John Martinis awarded the seventh Bell Prize
Posted by Quinn Sena in categories: computing, engineering, particle physics, quantum physics
John Martinis has done groundbreaking research on coherent superconducting devices since his PhD at the University of California, Berkeley, in 1985. These superconducting devices can be modeled as lumped-element electric circuits using Josephson junctions, capacitors and inductors as components. The fact that a superconducting phase across a Josephson junction can display coherent quantum behavior – even though it is a property of the wave function of an immense number of electrons – can be viewed as a fundamental discovery [1], kickstarting, in retrospect, the field of superconducting quantum computing.
John Martinis invented and developed the superconducting phase qubit, based on a current-biased Josephson junction, for the purpose of scalable multi-qubit quantum computing [2]. In 2002, he first demonstrated coherent Rabi oscillations and quantum measurement for such superconducting phase qubit [3]. He has had a longstanding interest in understanding the origin of noise in superconducting electric circuits as these sources of noise naturally limit qubit coherence. In particular, his understanding of noise sources such as dielectric loss, flux noise and the presence and dynamics of quasi-particles [4], by means of simple physical models, have been instrumental in the field. The effect and mitigation of quasi-particles and how they are affected by radiation and cosmic rays continues to be of high interest for the future of superconducting quantum devices [5, 6].
An important step showing his leadership and commitment to building a quantum computer came with his 2014 move, as a Professor at UCSB, to Google, where he gathered a large team of physicists and engineers to tackle the challenge of making a multi-qubit programmable processor. This team has excelled in its relentless focus on optimizing device performance by implementing successful engineering choices for qubit design, couplers and scalable I/O.