Traditional semiconductor chip design typically begins with a lengthy and often arduous process of specification definition, RTL model creation and documentation, before engineering teams can set out on designing actual circuits. However, what if this IP creation and team-based design review phase could be cut down to a few weeks, rather than months, with literally hundreds of hours of design team meetings saved in the process?
This is the goal of a new “ChipGPT” type tool, that Cadence Design Systems is bringing to market, which employs Large Language Models and generative AI to do much of the heavy lifting in this early semiconductor definition and design verification phase.
As a new… More.
Generative AI has once again proven itself capable of alleviating semiconductor design teams from large portions of iterative optimization and verification work.
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